Workshop on Reliable Systems Engineering

On Wednesday, 29th of April, we host a short workshop on reliable systems engineering, 3 OG@ISP. We will have three presentations:

Title: The Technology-Assurances Sandbox Experience
Date: 29th April 2026
Time: 9:00 – 10:00 AM
Venue: ISP, 3 OG, MFC-1

Abstract:
Malta set up its first technology-assurances sandbox in 2019, initially focussing on blockchain/DLT solutions, but then widening the scope to cover critical systems and certain technologies such as AI. Over the past years, EU regulation has been putting more emphasis on the need for regulatory-technological sandboxes, both with a technology focus (e.g. AI, Cybersecurity) and at a sectorial focus (e.g. financial services, cryptoassets). Malta has been adapting the solution it had built to meet the needs of such new regulation. In this talk, Professor Pace will provide an overview of the Maltese Sandbox experience, how it developed over the years, and its current model—highlighting lessons learnt and challenges faced.

Speaker Bio:
Professor Gordon Pace is a Professor at the University of Malta, specializing in software engineering, formal methods, and regulatory technologies. His research focuses on the application of rigorous techniques to ensure the correctness, reliability, and compliance of complex software systems. He has played a leading role in Malta’s technology-assurance initiatives, particularly in the development and evolution of regulatory sandboxes for emerging technologies such as blockchain and artificial intelligence. Professor Pace is widely published in his field and actively contributes to both academic research and national policy development in digital innovation and regulation.

Title: Interest beyond Violation: On Points-of-Interest in Runtime Verification
Date: 29th April 2026
Time: 10:00 – 11:00 AM
Venue: ISP, 3 OG, MFC-1

Abstract

Many formal verification techniques are concerned with comparing system behaviours with formal specifications. Although runtime verification has followed this path (comparing observed traces against formal properties), it has traditionally been burdened with another task—that of raising a flag when a violation is detected.

Different approaches can be found in the literature: identifying the earliest such instance, identifying all instances, or identifying instances where (potentially future) violations are inevitable. We argue that the lack of a clear distinction between the notion of system correctness and the hard-wired means of identification of points when violation is somehow detected, conflates the notions of points-of-detection and points-of-violation. Frequently, the point at which a point-of-violation may be detected is independent of the point of interest itself, and also independent of the point-of-reaction if a corrective measure is needed.

In this talk, I will provide a number of examples to motivate why these limitations are significant for the field of runtime verification and suggest some research directions in the area.

This is joint work with Christian Colombo and Gordon Pace.

Speaker Bio

Gerardo Schneider is Professor of Computer Science at the Department of Computer Science and Engineering, Chalmers University of Technology and University of Gothenburg, Sweden. He holds an engineering degree in Information Systems from the National Technological University in Argentina, an MSc from UFRGS (Brazil), and a PhD from the Université Joseph Fourier (VERIMAG lab, France).

He has held appointments at Uppsala University, IRISA/INRIA Rennes, and the University of Oslo. His research interests span formal methods, including software verification, formal specification and analysis of (legal) contracts, privacy, and the interaction between formal methods and AI. He is the co-author of Formal Methods for Software Engineering (Springer, 2022) and Turing's Children: How His Ideas Have Shaped the Modern World (ACM, 2026).

Title: Ruleless Digital Twins
Date: 29th April 2026
Time: 11:00 – 12:00 AM
Venue: ISP, 3 OG, MFC-1

Abstract

Digital Twins (DTs) as “digital counterparts of physical objects” provide value to their physical twins through automation and prediction/optimization.

We present our prototype of the Ruleless Digital Twin as an alternative to IF-THEN-driven decision making, relying on simulation through Functional Mockup Units (FMUs) and exploration of possible system states instead of hard-coded rules. Furthermore, by using ontologies as a base for the static structure of the system, we obtain an open, flexible design that can draw on existing tools for modeling, consistency checking and querying without being tied to a particular implementation.

* “Ruleless Digital Twins”, I.Spajić & Volker Stolz, DataMod’25. To appear in LNCS, 2026.
* https://github.com/ivanspajic/ruleless-digital-twins

Speaker Bio

Volker Stolz is professor in the software engineering group at the Høgskulen på Vestlandet (HVL, or “Western Norway University of Applied Sciences”) in Bergen, Norway. They received their doctoral degree (Dr.rer.nat.) from RWTH Aachen, Germany. In between, they held research- and teaching positions at the former United Nations University Institute for Software Technology (UNU-IIST) in Macao S.A.R., and the University of Oslo in Norway. Their research interests are formal methods in general, and applied to programming language semantics in particular. They have published on refactoring, runtime verification, and modeling tools.asdf

All are welcome to attend. Please signal your attendance to ensure that we have enough space.